How should the timing diagram of the chip be viewed, and what information can be obtained from it?

sheadons

I can only see from the chart is A signal (by rising or falling) B trigger signal, and a signal should be very high or very low. I ask what can get information from the figure. In addition, there is no detailed information on how to See FIGS such, that the cross-line and FIG what is the meaning (such as DATA and ADDR on the kind represented by the constant interaction of the two lines).

I said a little chaotic, seniors want to help. Thank you

darkhanyi

Digital Circuit and Logic Design

arfour

Because I was confused, let me talk about my views
The crossover line appears when the bus data changes. Depending on the value, the line is basically meaningless.
Generally, it depends on the delay when triggering. If you follow the delay-free processing, the data will be disordered. Generally, two NOT gates are connected in series to solve the delay.

sheadons

Thank you brothers on the second floor.

owen810

It also depends on the logic of other data when the function pin changes level, rising or falling edge.
Some are also edge-triggered